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K6X4008T1F Family
Document Title
512Kx8 bit Low Power and Low Voltage CMOS Static RAM
CMOS SRAM
Revision History
Revision No. History
0.0 0.1 Initial Draft Revised - Added 55ns product( Vcc = 3.0V~3.6V) Revised - Added Commercial product Revised - Errata correction : corrected commercial product family name from K6X4008T1F-F to K6X4008T1F-B in PRODUCT FAMILY. Finalized - Changed ICC from 4mA to 2mA - Changed ICC1 from 4mA to 3mA - Changed ICC2 from 30mA to 25mA - Changed ISB1(Commercial) from 15A to 10A - Changed ISB1(industrial) from 20A to 10A - Changed ISB1(Automotive) from 30A to 20A - Changed IDR(Commercial) from 15A to 10A - Changed IDR(industrial) from 20A to 10A - Changed IDR(Automotive) from 30A to 20A
Draft Data
July 29, 2002 October 14, 2002
Remark
Preliminary Preliminary
0.2
December 2, 2002
Preliminary
0.21
March 26, 2003
Preliminary
1.0
September 16, 2003
Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
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Revision 1.0 September 2003
K6X4008T1F Family
512Kx8 bit Low Power and Low Voltage CMOS Static RAM
FEATURES
* Process Technology: Full CMOS * Organization: 512Kx8 * Power Supply Voltage: 2.7~3.6V * Low Data Retention Voltage: 2V(Min) * Three State Outputs * Package Type: 32-SOP-525, 32-TSOP2-400F/R 32-TSOP1-0813.4F
CMOS SRAM
GENERAL DESCRIPTION
The K6X4008T1F families are fabricated by SAMSUNGs advanced full CMOS process technology. The families support various operating temperature range and have various package types for user flexibility of system design. The families also support low data retention voltage for battery back-up operation with low data retention current.
PRODUCT FAMILY
Product Family Operating Temperature K6X4008T1F-B K6X4008T1F-F K6X4008T1F-Q Commercial(0~70C) 551)/702)/85ns Industrial(-40~85C) Automotive(-40~125C) 2.7~3.6V 702)/85ns 10A 20A 25mA
32-SOP-525, 32-TSOP1-0813.4F 32-TSOP2-400F
Vcc Range
Power Dissipation Speed Standby Operating (ISB1, Max) (ICC2, Max) 10A PKG Type
32-SOP-525, 32-TSOP1-0813.4F 32-TSOP2-400F/R
1. This parameter is measured in the voltage range of 3.0V~3.6V with 30pF test load. 2. This parameter is measured with 30pF test load.
PIN DESCRIPTION
A18 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A15 A17 WE A13 A8 A9 A11 OE A10 CS I/O8 I/O7 I/O6 I/O5 I/O4 VCC A15 A17 WE A13 A8 A9 A11 OE A10 CS I/O8 I/O7 I/O6 I/O5 I/O4 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 A18 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 VSS
FUNCTIONAL BLOCK DIAGRAM
Clk gen. Precharge circuit.
32-SOP 32-TSOP2 (Forward)
32-TSOP2 (Reverse)
7 8 9 10 11 12 13 14 15 16
Row Addresses
Row select
Memory array
I/O1 A11 A9 A8 A13 WE A17 A15 VCC A18 A16 A14 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE A10 CS I/O8 I/O7 I/O6 I/O5 I/O4 VSS I/O3 I/O2 I/O1 A0 A1 A2 A3 I/O8
Data cont
I/O Circuit Column select
Data cont Column Addresses
32-STSOP1 (Forward)
CS WE
Control logic
Name
Function
Name Vcc Vss
Function Power Ground
OE
A0~A18 Address Inputs WE CS OE Write Enable Input Chip Select Input Output Enable Input
I/O1~I/O8 Data Inputs/Outputs
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice. 2
Revision 1.0 September 2003
K6X4008T1F Family
PRODUCT LIST
Commercial Products(0~70C) Part Name
K6X4008T1F-GB551) K6X4008T1F-GB70 K6X4008T1F-GB85 K6X4008T1F-YB551) K6X4008T1F-YB70 K6X4008T1F-YB85 K6X4008T1F-VB551) K6X4008T1F-VB70 K6X4008T1F-VB85 K6X4008T1F-MB551) K6X4008T1F-MB70 K6X4008T1F-MB85
CMOS SRAM
Industrial Products(-40~85C) Part Name
K6X4008T1F-GF551) K6X4008T1F-GF70 K6X4008T1F-GF85 K6X4008T1F-YF551) K6X4008T1F-YF70 K6X4008T1F-YF85 K6X4008T1F-VF551) K6X4008T1F-VF70 K6X4008T1F-VF85 K6X4008T1F-MF551) K6X4008T1F-MF70 K6X4008T1F-MF85
Automotive Products(-40~125C) Part Name
K6X4008T1F-GQ70 K6X4008T1F-GQ85 K6X4008T1F-YQ70 K6X4008T1F-YQ85 K6X4008T1F-VQ70 K6X4008T1F-VQ85
Function
32-SOP, 55ns, LL 32-SOP, 70ns, LL 32-SOP, 85ns, LL 32-sTSOP1-F, 55ns, LL 32-sTSOP1-F, 70ns, LL 32-sTSOP1-F, 85ns, LL 32-TSOP2-F, 55ns, LL 32-TSOP2-F, 70ns, LL 32-TSOP2-F, 85ns, LL 32-TSOP2-R, 55ns, LL 32-TSOP2-R, 70ns, LL 32-TSOP2-R, 85ns, LL
Function
32-SOP, 55ns, LL 32-SOP, 70ns, LL 32-SOP, 85ns, LL 32-sTSOP1-F, 55ns, LL 32-sTSOP1-F, 70ns, LL 32-sTSOP1-F, 85ns, LL 32-TSOP2-F, 55ns, LL 32-TSOP2-F, 70ns, LL 32-TSOP2-F, 85ns, LL 32-TSOP2-R, 55ns, LL 32-TSOP2-R, 70ns, LL 32-TSOP2-R, 85ns, LL
Function
32-SOP, 70ns, L 32-SOP, 85ns, L 32-sTSOP1-F, 70ns, L 32-sTSOP1-F, 85ns, L 32-TSOP2-F, 70ns, L 32-TSOP2-F, 85ns, L
1. Operating voltage range is 3.0V~3.6V
FUNCTIONAL DESCRIPTION
CS H L L L OE X
1)
WE X
1)
I/O High-Z High-Z Dout Din
Mode Deselected Output Disabled Read Write
Power Standby Active Active Active
H L X1)
H H L
1. X means dont care (Must be in low or high state)
ABSOLUTE MAXIMUM RATINGS1)
Item Voltage on any pin relative to Vss Voltage on Vcc supply relative to Vss Power Dissipation Storage temperature Symbol VIN, VOUT VCC PD TSTG Ratings -0.2 to VCC+0.3(max. 3.9V) -0.2 to 3.9 1.0 -65 to 150 0 to 70 Operating Temperature TA -40 to 85 -40 to 125 Unit V V W C C C C Remark K6F4008T1F-B K6F4008T1F-F K6F4008T1F-Q
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
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Revision 1.0 September 2003
K6X4008T1F Family
RECOMMENDED DC OPERATING CONDITIONS1)
Item Supply voltage Ground Input high voltage Input low voltage Symbol Vcc Vss VIH VIL Min 2.7 0 2.2 -0.23) Typ 3.0/3.3 0 -
CMOS SRAM
Max 3.6 0 Vcc+0.22) 0.6 Unit V V V V
Note: 1. Commercial Product: TA=0 to 70C, otherwise specified Industrial Product: TA=-40 to 85C, otherwise specified Automotive Product: TA=-40 to 125C, otherwise specified
2. Overshoot: VCC+2.0V in case of pulse width 30ns
3. Undershoot: -2.0V in case of pulse width 30ns 4. Overshoot and undershoot are sampled, not 100% tested.
CAPACITANCE1) (f=1MHz, TA=25C)
Item Input capacitance Input/Output capacitance
1. Capacitance is sampled, not 100% tested.
Symbol CIN CIO
Test Condition VIN=0V VIO=0V
Min -
Max 8 10
Unit pF pF
DC AND OPERATING CHARACTERISTICS
Item Input leakage current Output leakage current Operating power supply current Average operating current Output low voltage Output high voltage Standby Current(TTL) Symbol ILI ILO ICC ICC1 ICC2 VOL VOH ISB VIN=Vss to Vcc CS=VIH or OE=VIH or WE=VIL VIO=Vss to Vcc IIO=0mA, CS=VIL, VIN=VIL or VIH, Read
Cycle time=1s, 100% duty, IIO=0mA CS0.2V,VIN0.2V or VINVcc-0.2V
Test Conditions
Min -1 -1 2.4 K6X4008T1F-B -
Typ -
Max 1 1 2 3 25 0.4 0.3 10 10 20
Unit A A mA mA mA V V mA A A A
Cycle time=Min, 100% duty, IIO=0mA, CS=VIL, VIN=VIH or VIL
IOL=2.1mA IOH=-1.0mA CS=VIH, Other inputs = VIL or VIH
Standby Current (CMOS)
ISB1
CSVcc-0.2V, Other inputs=0~Vcc
K6X4008T1F-F K6X4008T1F-Q
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Revision 1.0 September 2003
K6X4008T1F Family
AC OPERATING CONDITIONS
TEST CONDITIONS(Test Load and Input/Output Reference)
Input pulse level: 0.4 to 2.2V Input rising and falling time: 5ns Input and output reference voltage: 1.5V Output load(see right): CL=100pF+1TTL CL1)=30pF+1TTL
1. 55ns, 70ns product
CMOS SRAM
CL1) 1. Including scope and jig capacitance
AC CHARACTERISTICS
(VCC=2.7~3.6V, Commercial product: TA=0 to 70C, Industrial product: TA=-40 to 85C, Automotive product: TA=-40 to 125C)
Speed Bins Parameter List Symbol Min Read cycle time Address access time Chip select to output Output enable to valid output Read Chip select to low-Z output Output enable to low-Z output Chip disable to high-Z output Output disable to high-Z output Output hold from address change Write cycle time Chip select to end of write Address set-up time Address valid to end of write Write Write pulse width Write recovery time Write to output high-Z Data to write time overlap Data hold from write time End write to output low-Z tRC tAA tCO tOE tLZ tOLZ tHZ tOHZ tOH tWC tCW tAS tAW tWP tWR tWHZ tDW tDH tOW 55 10 5 0 0 10 55 45 0 45 40 0 0 25 0 5 55ns
1)
70ns Max 55 55 25 20 20 20 Min 70 10 5 0 0 10 70 60 0 60 55 0 0 30 0 5 Max 70 70 35 25 25 25 Min 85 10 5 0 0 10 85 70 0 70 55 0 0 35 0 5
85ns Max 85 85 40 25 25 25 -
Units
ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
1. Voltage range is 3.0V~3.6V for commercial and industrial product.
DATA RETENTION CHARACTERISTICS
Item Vcc for data retention Symbol VDR CSVcc-0.2V K6X4008T1F-B Data retention current IDR Vcc=3.0V, CSVcc-0.2V K6X4008T1F-F K6X4008T1F-Q Data retention set-up time Recovery time tSDR tRDR See data retention waveform Test Condition Min 2.0 0 5 0.5 Typ1) Max 3.6 10 10 20 Unit V A A A ms
1. Typical values are measured at TA = 25C and not 100% tested.
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Revision 1.0 September 2003
K6X4008T1F Family
TIMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1) (Address Controlled, CS=OE=VIL, WE=VIH)
tRC Address tOH Data Out Previous Data Valid tAA
CMOS SRAM
Data Valid
TIMING WAVEFORM OF READ CYCLE(2) (WE=VIH)
tRC Address tAA tCO1 CS tOE OE tOLZ tLZ Data Valid tOHZ tHZ tOH
Data out
NOTES (READ CYCLE)
High-Z
1. tHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage levels. 2. At any given temperature and voltage condition, tHZ(Max.) is less than tLZ(Min.) both for a given device and from device to device interconnection.
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Revision 1.0 September 2003
K6X4008T1F Family
TIMING WAVEFORM OF WRITE CYCLE(1) (WE Controlled)
tWC Address tCW(2) CS tAW tWP(1) WE tAS(3) Data in tWHZ Data out Data Undefined tDW Data Valid tOW tDH tWR(4)
CMOS SRAM
TIMING WAVEFORM OF WRITE CYCLE(2) (CS
Controlled)
tWC Address tAS(3) CS tAW tWP(1) WE tDW Data in Data Valid tDH tCW(2) tWR(4)
Data out
NOTES (WRITE CYCLE)
High-Z
High-Z
1. A write occurs during the overlap of a low CS and a low WE. A write begins at the latest transition among CS going Low and WE going low : A write end at the earliest transition among CS going high and WE going high, tWP is measured from the begining of write to the end of write. 2. tCW is measured from the CS going low to the end of write. 3. tAS is measured from the address valid to the beginning of write. 4. tWR is measured from the end of write to the address change. tWR is applied in case a write ends with CS or WE going high.
DATA RETENTION WAVE FORM
CS controlled
VCC 2.7V tSDR Data Retention Mode tRDR
2.2V VDR CSVCC - 0.2V CS GND
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Revision 1.0 September 2003
K6X4008T1F Family
PACKAGE DIMENSIONS
32 PIN PLASTIC SMALL OUTLINE PACKAGE (525mil)
CMOS SRAM
Units: millimeters(inches)
0~8 #32 #17
14.120.30 0.5560.012
11.430.20 0.4500.008
13.34 0.525
#1 20.87 0.822 MAX 20.470.20 0.8060.008
#16
2.740.20 0.1080.008 3.00 0.118 MAX
0.20 +0.10 -0.05 0.008+0.004 -0.002
0.800.20 0.0310.008
0.10 MAX 0.004 MAX
+0.100 -0.050 +0.004 0.016 -0.002
( 0.71 ) 0.028
0.41
1.27 0.050
0.05 0.002 MIN
32 PIN SMALLER THIN SMALL OUTLINE PACKAGE TYPE I (0813.4F)
0.20
+0.10 -0.05 0.008+0.004 -0.002
13.400.20 0.5280.008 #32 ( 8.00 0.315 0.25 ) 0.010
#1
8.40 0.331 MAX
0.50 0.0197
#16
#17 1.000.10 0.0390.004 1.20 0.047 MAX 11.800.10 0.4650.004
+0.10 -0.05 0.006+0.004 -0.002
0.05 0.002 MIN
0.25 0.010 TYP
0.15
0~8
0.45 ~0.75 0.018 ~0.030
(
0.50 ) 0.020
8
1.10 MAX 0.004 MAX
Revision 1.0 September 2003
K6X4008T1F Family
PACKAGE DIMENSIONS
32 PIN THIN SMALL OUTLINE PACKAGE TYPE II (400F)
0.25 ( 0.010 ) #32 #17
CMOS SRAM
Units: millimeters(inches)
0~8
0.45~0.75 0.018 ~ 0.030
11.760.20 0.4630.008
#1 21.35 0.841 MAX 20.950.10 0.8250.004
#16 1.000.10 0.0390.004 1.20 0.047MAX 0.15 +0.10 -0.05 0.006 +0.004 -0.002
10.16 0.400
(
0.50 ) 0.020
0.10 MAX 0.004 MAX
( 0.95 ) 0.037
0.400.10 0.0160.004
1.27 0.050
0.05 0.002MIN
32 PIN THIN SMALL OUTLINE PACKAGE TYPE II (400R)
( 0.25 ) 0.010 #1 #16
0~8
0.45 ~0.75 0.018 ~ 0.030
11.760.20 0.4630.008
#32 21.35 0.841 MAX 20.950.10 0.8250.004
#17 1.000.10 0.0390.004 1.20 0.047 MAX 0.10 MAX 0.004 MAX
+0.10 -0.05 0.006 +0.004 -0.002
10.16 0.400
0.15
( 0.50 ) 0.020
( 0.95 ) 0.037
0.400.10 0.0160.004
1.27 0.050
0.05 0.002MIN
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Revision 1.0 September 2003

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